University

Computer Architectures

Computer Architectures

Course Hub

This is the main entry point for the course.
Use it to jump to lectures, labs, exercises, assignments, concepts, and exam preparation.

🚀 Current Focus

Tip

Keep only the things you are actively working on here.
Move completed items into their proper lecture, lab, or exercise note.

📚 Lectures

Next lecture

🧪 Labs

Note

Put lab files inside:
50 Labs/Computer Architectures/

Active

Completed

✏️ Exercises

Note

Exercises should link back to the concepts they test.

Active

  • Exercise Set 01 (note not created yet)

Important mistakes to revisit

Completed

📦 Assignments

To do

  • [ ]

Submitted

🧠 Concepts

RISC-V fundamentals

Control flow

Processor performance

Pipeline topics to expand later

These can become their own concept notes when they start appearing in several lectures, labs, or exercises:

Important

Do not create a separate concept note just because a term exists.
Split it out when you have enough material, exercises, or links that it deserves its own page.

❓ Questions / Things I Don’t Understand Yet

  • [ ]

Examples:

  • Why does this instruction need a stall?
  • Why can forwarding solve one dependency but not another?
  • Why is this branch taken?
  • What exactly is stored in this register at this point?

Once answered, move the explanation into the relevant concept note.

🔗 Quick Navigation

Course work

Most-used concepts

📖 Resources

Slides / PDFs

  • Pipelining lecture slides

Useful references

🎯 Exam Preparation

Topics checklist

RISC-V

  • Registers and ABI names
  • Immediate values
  • addi
  • lui
  • li
  • Shifts
  • Signed vs unsigned comparisons

Memory

  • Address vs value
  • la
  • lw
  • sw
  • offset(base) addressing
  • Arrays and pointer increments

Functions and stack

  • jal
  • jalr
  • call
  • ret
  • ra
  • sp
  • Saving return addresses
  • LIFO stack behavior

Branches

  • Conditional branches
  • Taken vs not taken
  • Signed vs unsigned branches
  • Loops

Pipelining

  • IF / ID / EX / MEM / WB
  • Throughput vs latency
  • CPI
  • Pipeline registers
  • Structural hazards
  • Data hazards
  • Forwarding
  • Load-use stalls
  • Bubbles
  • Control hazards
  • Flush
  • Predict taken
  • Predict untaken
  • Delayed branch

🔥 Weak Areas

Use this section shortly before the exam.

TopicConfidenceWhat to do
Pipelining⭐⭐⭐Solve more timing diagrams
Memory addressing⭐⭐⭐⭐Quick review
Stack⭐⭐⭐⭐Practice nested calls
Branch hazards⭐⭐⭐Review taken/not-taken examples

Change these ratings yourself as you study.

📝 Practice / Mock Exam

  • Do one exercise without notes
  • Explain pipeline hazards from memory
  • Draw the 5-stage pipeline from memory
  • Trace a nested function call and stack
  • Trace an array loop using addresses
  • Explain a load-use stall
  • Explain what happens after a wrong branch prediction

🗂 Course Structure

Current files for this course:

10 Courses/
├── Computer Architectures.md   ← YOU ARE HERE
└── Computer Architectures/
    └── Lectures/
 
20 Concepts/
└── Computer Architectures/
    ├── RISC-V.md
    ├── Registers and Immediates.md
    ├── Memory Addressing.md
    ├── Stack.md
    ├── Function Calls.md
    ├── Branches.md
    └── Pipelining.md
 
50 Labs/
└── Computer Architectures/
    ├── Lab 01 - gem5 and ASE Studio.md
    └── lab_01 1.docx

Lecture notes preserve course context; concept notes hold reusable knowledge; lab notes track practical work and results.
Create exercise, assignment, and resource folders under 10 Courses/Computer Architectures/ when needed.

✅ End-of-week reset

Once a week:

  • Clear finished items from Current Focus
  • Make sure every lecture has useful concept links
  • File loose notes from 00 Inbox
  • Record mistakes from exercises
  • Update Weak Areas
  • Pick the next topics to review

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