RISC-V

Course: Computer Architectures
Type: Concept

Definition

RISC-V is an instruction set architecture built around a small set of simple instructions and regular instruction formats.

For RV32, general-purpose registers hold 32-bit values.

Key ideas

• Registers are named x0 through x31.
• x0 always contains 0.
• Some registers also have ABI names, such as:
  • x1 = ra
  • x2 = sp
• Many convenient assembly instructions are pseudo-instructions that the assembler expands into real instructions.

Examples

addi x1, x2, 5

means:

x1 = x2 + 5

li x5, 100

may be translated by the assembler into:

addi x5, x0, 100

Important rules

• Arithmetic instructions normally operate on registers.
• Immediate instructions encode a constant directly in the instruction.
• Loads and stores access memory using offset(base_register).
• Branches and jumps modify the program counter.

Related concepts

• Registers and Immediates
• Memory Addressing
• Function Calls
• Branches
• Pipelining