Latency and Initiation Interval

Latency concerns when a dependent instruction can use a result. Initiation interval concerns when the same unit can accept another operation.

Lecture definitions and example

The professor defines latency through the separation required between a producing instruction and a consuming instruction. Initiation interval (II) is the elapsed time between issuing two operations of the same type to the same unit.

Functional unit	Latency	II
Integer ALU	0	1
Data Memory	1	1
FP add	3	1
FP/integer multiply	6	1
FP/integer divide	24	25

These values belong to the introductory multicycle example, not the later R4000 FP table.

Clarification: the lecture’s counting convention

The stage diagrams clarify the table: FP add has four execution stages but latency 3; multiply has seven stages but latency 6. Here latency counts the intervening cycles required before a dependent operation can follow, relative to immediately consecutive execution starts. It is not the instruction’s total IF-to-WB duration.

For an add result needed at the consumer’s first execution stage, with forwarding:

Execution cycle:       1   2   3   4   5
Producer FP add:      A1  A2  A3  A4
Dependent consumer:                  first EX stage
Independent FP add:       A1  A2  A3  A4

There are three intervening cycles before the dependent start; independent adds can start every cycle. Integer ALU latency 0 similarly permits consecutive dependent execution starts with suitable forwarding. It does not mean that an ALU takes zero time.

With divide II = 25, starts at cycles 1 and 26 are 25 cycles apart.

Reusable explanation

A pipelined unit overlaps different operations in different stages. A car wash can take several minutes per car while accepting a new car every minute. II describes start spacing; latency constrains dependent work.

Always check a source’s counting convention and the consumer’s operand-use stage. Some tables use latency to count the full execution duration, as in the MIPS R4000 FP Pipeline table.

Common mistakes

• Assuming a long-latency unit cannot accept independent work each cycle.
• Treating II as the delay between a producer and its consumer.
• Assuming forwarding can deliver a result before it exists.

Related: Multicycle Operations, RAW and WAW Hazards, Structural Hazards in Multicycle Pipelines.

Source

E. Sanchez, Multicycle operations, Politecnico di Torino, ASE 2026/27, slides 5-10. PDF page numbers match slide numbers.

Lecture context: Lecture 05 - Multicycle Operations. Sections marked as clarification or reusable explanation add study guidance to the slide material.